1. Field of the Invention
The present invention relates to the field of amplifiers.
2. Prior Art
Amplifiers of many diverse types are well-known in prior art. Of particular importance to the present invention, however, are amplifiers comprising one or more field effect devices as the active amplifying element and/or as load devices in amplifier circuits. As used herein, the terms field effect devices and field effect transistors are used in the most general sense to identify semiconductor devices or circuits wherein the flow of charge carriers from one region to a second region in the semiconductor device is dependent upon the voltage applied to a control gate in the device. Semiconductor devices of this type generally include junction field effect devices and surface field effect devices, the structures and characteristics of which are generally described in the book entitled "Physics and Technology of Semiconductor Devices" by A. S. Grove (John Wiley & Sons, Inc., 1967) and "MOS Field-Effect Transistors and Integrated Circuits" by Paul Richman (John Wiley & Sons, Inc., 1973). As described therein, a field effect transistor may be considered as device which utilizes an electric field to modulate the conductance of a channel through which current flows. In that regard, field effect transistors may be considered as three terminal devices, these terminals being defined as a source of carriers, a drain of carriers and a voltage controlling gate through which the field control of conductance between source and drain is implemented. (A substrate connection is also required, thereby potentially providing a four terminal device, though generally the substrate is tied to the source, thereby being transparent to the device user.) While the specific mechanics of the field control differs between the pn junction and the insulated gate field effect transistors (FETs), the concept of using voltage on the high impedance gate to modulate the conductance of the drain source channel is the commonality which defines the field effect transistor.
A fundamental amplifying parameter of the field effect transistor is its transconductance, g.sub.m. This parameter is defined as the ratio of the incremental increase in drain-source current for an applied incremental increase in gate-to-source voltage: ##EQU1## where I.sub.D equals the drain current, V.sub.GS equals the voltage on the gate with respect to the source and V.sub.DS is the voltage between the drain and source. The actual conductance of the drain-source channel is termed g.sub.o (output conductance), another fundamental amplifying parameter.
The prior art shows the simplest method of making a voltage amplifier to be attaching a load resistor from the power supply to the FET drain, and applying a gate voltage sufficient to bias the device to draw a nominal current through the load resistor. Modulation of the gate-to-source voltage causes changes in the device's thru-current (via transconductance) to develop an output voltage at the drain. The voltage step-up obtainable is the product of the FET transconductance with the total resistance seen at the output, a parallel combination of the load resistance and the drain-source resistance. ##EQU2## where A.sub.V equals voltage gain, R.sub.L equals the load resistor, R.sub.DS equals the resistance between the drain and source at the operating point (1/g.sub.o).
The drawback to using this much-used technique is that very high voltage gains are not possible without power supply voltages which greatly exceed the drain-source voltage, as the load resistor drops voltage due to the bias current. Further, an amplifier of this type is relatively non-linear and because the amplifier is unsymmetrical; the distortion of an AC input is also unsymmetrical, giving rise not only to high-third and other odd harmonics, but also high-second and other even harmonics. Also, obviously the output is highly sensitive to power supply fluctuations.
To achieve high voltage gains, the prior art shows utilization of another field effect transistor biased in saturation and used as a load resistor (the first field effect transistor also being operated in saturation). The additional device is connected drain-to-power supply, source-to-lower device drain, with a capacitor between the gate and source terminals to provide an AC short therebetween. A resistor divider from the power supply sets the upper gate voltage while the lower device bias sets the current flowing through both devices. Since the upper device source `floats`, the gate-source bias conditions for the determined current automatically sets for similar FETs.
At frequencies which the capacitor appears as a short, the upper FET acts as a load resistor R.sub.DS =1/g.sub.o since the gate-to-source voltage for the AC will be zero and no transconductance action can occur. The DC bias conditions (drain-source current and voltage) determine the magnitude of the drain-source resistances of the FETs (both biased in saturation). If the upper and lower FETs are identical, then the voltage gain is: ##EQU3## Since high drain-source resistances are possible with FETs in saturation at modest drain-source voltages, high voltage gains are possible with AC and nominal power supply voltages.
However, unlike simple resistors, the field effect load resistance varies with the voltage applied across it. Since it is the field effect which manifests this resistance, variations in field across the drain-source channel alters the conductance as well as variations in the gate-source voltage (although the magnitudes differ considerably). This voltage-variable resistance characteristic of the FET load resistor is a drawback to its use in linear amplifiers.
The voltage gain of the dual FET AC amplifier is dependent upon the magnitude of the drain-source conductance. Therefore, voltage modulations across either FET will modulate the voltage gain.
The drain-source conductances are modulated by the output voltage at the center drain-source node (both upper and lower FET drain-source channels). Also, the upper FET load resistor is modulated by variations (noise) in the power supply voltage, and voltages due to current noise in the drain-source channel.
The voltage gain of the amplifier may be represented as a function of the input and output voltages in some polynominal fashion, the terms of the polynomial, other than the linear term, describing the nonlinearity. The function is not important; the relation between the input and output is coherent (although distorted). Whereas the output may not exactly replicate the input (distorted), because the voltage gain is coherent the form of the output is always predictable. Because of this property, the input signal and feedback techniques can reduce the distortion in the output due to the modulation of the FET characteristics by both the input and output.
However, if the voltage gain is modulated by the power supply noise through the drain-source conductance dependency with voltage, or by internally generated noise in the channel, the voltage gain then has noise-dependent terms in its magnitude; it becomes incoherent. Because the `noise dependence` in the gain reduces the predictability of the output form, feedback techniques have reduced effectiveness. In that regard, the fundamental requirement of any amplifier is to increase the magnitude of its input without distortion of any kind. All amplifying devices generate noise and amplify with characteristics which are dependent to some extent upon bias and signal currents and voltages (e.g. nonlinear). The interaction of the amplification nonlinearity with the circuit noise creates an intermodulation of the amplification characteristic, and hence the output, with noise. This noise intermodulation phenonmenon therefore converts some of the output information into noise. Another way of saying this is that the input signal correlation with the output is not perfect because the output signal was made partially incoherent due to the noise intermodulation phenomenon. Since noise is incoherent by definition, noise intermodulation reduces the temporal coherence of the amplification process (and thereby reduces the coherence of any information passed through the amplifier). A limitation of temporal coherence on the amplifier poses a limit to the dynamic range of information which can be passed through it; there is a limitation to the information density which the amplifier can accurately recreate. Of course, this limitation reduces the effectiveness of feedback correction of coherent distortion; feedback is a linear addition process and can no way correct a loss of information due to limited amplification coherence.
The modulation of the amplifier voltage gain by noise reduces the coherence of the amplifying function. For applications of voltage amplification which have a requirement for coherence, reduction of the effects of channel and power supply noise modulation is essential. However, the prior art FET loaded AC voltage amplifier is attractive because of the high voltage gains which are possible at modest power supply voltages. If this voltage gain could be made coherent, then the large excess gain could be used with feedback to provide a very linear amplifier. In that regard, it is important to point out that there are two noise sources which intermodulate: noise within the channel (current noise) and noise across the channel due to the power supply. Nothing can be done about internal noise but power supply noise can be reduced because it is "external." Power supply noise can be reduced according to the prior art with a series power supply resistor and a shunt capacitor on the drain of the load FET. The rejection in this case is determined by the time constant of the capacitor with the parallel combination of the series resistor and the drain-source resistance. To achieve high rejection, either the resistor must be very large (high voltage drop) or the capacitor very large (impractical at lower frequencies), even for modest power outputs.